Low power Edge AI Chips

Expected Outcome:Successful proposals are expected to deliver the following outcomes: Develop AI chip prototypes reaching TRL 6-7, integrating cutting-edge technologies such as non-volatile memories, neuromorphic computing, 3D heterogeneous integration, and photonic connectivity. These prototypes should be tested under real-world conditions and show potential for industrial scaling. Leverage the advanced capabilities of state-of-the-art infrastructures with fabrication and testing capabilities available within the Union, especially at leading Research and Technology Organisations (RTOs). This includes utilizing the Testing and Experimentation Facility (TEF) for Edge AI hardware (PREVAIL project[1]), a platform designed to accelerate the development of cutting-edge AI solutions, as well as Pilot Lines, including the ones of the Chips for Europe Initiative. The prototypes should demonstrate robust AI capabilities, including real-time inference, on-device learning, and adaptive decision-making. This enables edge AI systems to process data locally, make decisions, and adapt to changing environments without relying on cloud infrastructure, reducing latency and power consumption. The prototypes must achieve ultra-low power consumption to ensure energy-efficient AI operations in power-constrained edge environments, particularly for battery-powered devices. The emphasis should be on balancing computing power with energy efficiency. By advancing AI chips that are energy-efficient and…